发明名称 INTEGRATION CIRCUIT
摘要 PURPOSE:To use an input signal and a control signal even in the asynchronous state by providing 1st and 2nd integration dump circuits dumping an integration value obtained through the integration of an input signal for a prescribed time and one of them being in the integration state while the other being in the dump state and a synthesis circuit synthesizing the outputs of the 1st and 2nd integration dump circuits. CONSTITUTION:The circuit is provided with the 1st and 2nd integration dump circuits 1, 2 which dump an integration value obtained through the integration of an input signal (a) for a prescribed time and when one of which is in the integration state, the other is in the dump state and with a synthesis circuit synthesizing the outputs of the 1st and 2nd integration dump circuits 1, 2. Then the output (a) of a correlation, the outputs d, e are synthesized and the 1st and 2nd integration dump circuits 1, 2 give outputs alternately by switches 3, 4 applying switching control. Thus, the signal processing is attained even asynchronously in case of processing the signal of the correlation device output by integration dump and applying data demodulation.
申请公布号 JPH01181345(A) 申请公布日期 1989.07.19
申请号 JP19880007140 申请日期 1988.01.14
申请人 CLARION CO LTD 发明人 UCHIDA YOSHITAKA;MORI SEIJI
分类号 H04J13/00;G06G7/18;H03H17/00;H04B1/707 主分类号 H04J13/00
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