| 摘要 |
PURPOSE:To make the potential of a high level output at an output node equal to a power supply voltage by providing the 8th transistor(TR) and the 1st capacitor connected as specified between a node gate of the 3rd TR and a gate of the 6th TR and the 1st node. CONSTITUTION:Since the level of a precharge signal phip is at H, active signals phi0, phi1 are at L level in the initial state, the level of nodes N23, N24, N7, N8, N3, N5 go to H and the level of nodes N21, N22, N1, N2, N4, N6 and output nodes V0, the inverse of V0 go to L. Then the signal phip goes from H to L and then the signal phi0 goes to H. When the potential VIN is higher than the potential Vref, the potential at the node N22 goes to L by a TR T21 and the N21 goes to H, then the potential of the N24, N8 goes to L by a T30, and nodes N23, N7 keep H because T29 is not active. When the phi1 goes to H, the N1 goes to H and N2 goes to L by a T1. When the potential of N4 is not VT or over, the capacitor C1 is charged to a potential over VP. In the process of the potential V0 from L to H by the potential, the N4 reaches a potential higher by VT or over than the power voltage, the level H at the output node V0 is the same potential as the power voltage. |
