Clock recovery system for digital data

摘要

A system and method for recovering a clock signal from digital data signals which do not include a separate clock signal. The system and method detect transitions from one logic state to the other logic state in the digital data signal, and compare the time alignment of these logic state transitions to an input clock signal from a voltage controlled oscillator. A correction control signal is generated as a function of the time alignment of the digital data signal transition with the input clock signal, and applied to the oscillator to vary the frequency of the clock signal as a function of the correction control signal, whereby a digital data recovered clock signal is aligned with the digital data signal.