发明名称 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
摘要 <p>PURPOSE:To attain high-speed writing by changing a voltage to impress from a bias circuit to a gate electrode between at the time of program verifying and at the time of information reading. CONSTITUTION:A gate electrode having the capacity coupling between the floating gate electrode of a memory cell is provided. Further, the respective different voltages are impressed to the gate electrode at the time of the program verifying (a program mode) and at the time of the information reading (a reading mode), a threshold voltage VTH of the apparent memory cell is changed, and a writing margin is obtained. Thus, by changing the threshold voltage VTH of the apparent memory cell, a supply voltage at the respective modes is made constant, and the high-speed writing action to obtain a sufficient writing quantity is attained.</p>
申请公布号 JPH01173494(A) 申请公布日期 1989.07.10
申请号 JP19870334712 申请日期 1987.12.28
申请人 TOSHIBA CORP 发明人 MIYAGAWA TADASHI;YOKOYAMA SADAYUKI;ASANO MASAMICHI
分类号 G11C29/00;G11C16/06;G11C17/00;G11C29/12 主分类号 G11C29/00
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