MAIN STORAGE FALLURE ADDRESS CONTROL SYSTEM IN A DATA PROCESSING SYSTEM

摘要

The failed main storage address register is located in a memory control unit as an input to a selector. An output of a further selector is a selected one of accessed addresses sent from various CPU chips through a respective address port. The output of the further selector is sent to the failed main storage address register. If an error is detected in a main storage unit or a key storage unit of a main storage unit, the OR gate operates to set that address in the failed main storage address register. Simultaneously, an address designated by a store command in the hardware prefix area is sent to the main storage unit and the register contents are stored there.