| 摘要 |
PURPOSE:To prevent the effect to be given on the characteristic of normal operation and to constitute a flip-flop circuit as a shift register by providing a terminal provided with a delay circuit and a terminal not provided to a shift-in input or an output of the flip-flop circuit possible for scan path constitution. CONSTITUTION:Flip-flop circuits 7, 8 have terminal SQ1, SQ2 supplying an output signal via buffers 10, 11 respectively. Selectors 5, 6 switch a normal signal and a signal at shift register operation. A terminal 1 is used for a scan-in signal, a terminal 4 is for a scan-out signal and a terminal 3 is used for a clock signal. A buffer 9 is a buffer to match the delay of the clock signal in the normal mode. In such a connection as above, even when the speed of the clock signal 8 is sufficiently faster than that of the clock signal 7, since the buffer 10 is provided, a flip-flop circuit 7 applies normal shift register operation to read a value before the flip-flop 8 is in operation. |
