发明名称 Adding apparatus having a high accuracy.
摘要 <p>An apparatus (110) for adding a second input value (2) and a first input value (1) smaller than the second input value (2) comprises a memory device (107) for memorizing an under flow component; a first adder (103) for adding an output value from the memory device (107) and the first input value (1); a second adder (106) for adding an output value of the first adder (103) and the second input value (2); a first subtracter (105) for subtracting the second input value from an output value of the second adder (106); and a comparator (104) for comparing the output value of the first adder (103) and an output value of the first subtractor (105). It is judged by an output value of the comparator (104) whether or not the output value of the first adder (103) is memorized in the memory device (107).</p>
申请公布号 EP0322520(A2) 申请公布日期 1989.07.05
申请号 EP19880116468 申请日期 1988.10.05
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 KAMITAKE, TAKASHI;KAWAMURA, SHIN-ICHI;ABE, MASAHIRO
分类号 G06F7/485;G06F7/50 主分类号 G06F7/485
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