发明名称 Multiprocessor memory access control system.
摘要 <p>A multiprocessor control system comprises one or more main storage units (MSU0 ... MSU3), a plurality of main storage control units (MCU0, MCU1), a plurality of processing units (PE0 ... PE3), and a control bus (16). Each processing unit is connected to the or each main storage unit through one of the main storage control units, and when one processing unit (e.g. P E0) transmits a request for access to one of the main storage units (e.g. MSU0), that processing unit transmits its request to the main storage control unit (e.g. MCU0) to which it is connected, and simultaneously, to all of the other main storage control units (e.g. MCU1) via the control bus (16). All of the main storage control units (MCU0, MCU1) process the request from the processing unit, synchronously, and execute a busy check control or the like. Data transmitted between each processing unit and an arbitrary one of the main storage units is transmitted only through the main storage control unit to which the processing unit is connected. By using this system, if units needing a high throughput are applied, the system can be controlled in a comparatively simple manner.</p>
申请公布号 EP0323080(A2) 申请公布日期 1989.07.05
申请号 EP19880311913 申请日期 1988.12.16
申请人 FUJITSU LIMITED 发明人 UCHIDA, NOBUO;KURODA, YASUHIRO;NAKATANI, SHOJI
分类号 G06F9/52;G06F15/16;G06F13/16;G06F15/177;G06F17/16 主分类号 G06F9/52
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