| 摘要 |
<p>A digital phase comparing circuit includes: first and second input terminals (IN1, IN2); a level change detecting circuit (D1, D2) for detecting changes in levels of first and second input signals (S1, S2) applied to the first and second input terminals, respectively, and outputting first and second detection signals (S3, S4) indicating the changes in levels; and a flip-flop circuit (FF3, FF4, 11) which is set in response to an input of one of the first and second detection signals and which is reset in response to a following input of one of the first and second detection signals. The digital phase comparing circuit outputs a pair of output signals (S5, S6; S7, S8) having a pulse width corresponding to a phase difference ( phi , phi 1, phi 2) between the first and second input signals, thereby making it convenient for a following circuit to utilize both "H" level and "L" level signals, while simplifying the process and facilitating the high degree of integration thereof.</p> |
