DETECTING METHOD FOR TERMINAL MISINSERTION OF IC COMPONENT,申请号JP19870327598-传众专利搜索

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发明名称	DETECTING METHOD FOR TERMINAL MISINSERTION OF IC COMPONENT
摘要
申请公布号	JPH01167682(A)	申请公布日期	1989.07.03
申请号	JP19870327598	申请日期	1987.12.24
申请人	HIOKI EE CORP	发明人	SAIJO YOSHIYUKI
分类号	G01R31/26;G01R31/02;H01L21/66	主分类号	G01R31/26
代理机构		代理人
主权项
地址

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