发明名称 TRI-STATE OUTPUT CIRCUIT
摘要 PURPOSE:To prevent the integration degree from being affected depending on the degree of output driving capability and to reduce the number of required components by adopting the constitution such that a series connection part of transistors(TRs) is not in existence to the pre-stage of an output buffer circuit comprising complementary TRs. CONSTITUTION:A TR Q11 interposed between a gate of a TR Q1 in an output buffer circuit and a signal input terminal 11 and whose gate is controlled by a control signal from a control signal input terminal 12 and a TR Q12 interposed between a gate in the TR Q1 and a positive power supply line LP and whose gate is controlled by the control signal are provided to the circuit. Moreover, a TR Q13 interposed between a gate of other TR Q2 in the output buffer circuit and a control signal input terminal and whose gate is controlled by an input signal A from the signal input terminal, and a TR Q14 interposed between a gate of the TR Q2 and a ground side power line LG and whose gate is controlled by the input signal from the signal input terminal are provided to the circuit. Even when the output drive capability is desired to be increased, the number of TRs is reduced without losing the degree of circuit integration.
申请公布号 JPH01168120(A) 申请公布日期 1989.07.03
申请号 JP19870325572 申请日期 1987.12.24
申请人 FUJITSU LTD 发明人 TAKAGI OSAMU
分类号 H03K19/0175;H03K19/094 主分类号 H03K19/0175
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