| 摘要 |
PURPOSE:To prevent a fault of a priority selecting circuit and avoid the deterioraration of process efficiency of a multiprocessor system, by reading the priority selection result signal out of a common memory by an instruction given from a processor. CONSTITUTION:A processor 1-1 executes the priority selection result reading instruction, and at the same time a processor 1-n delivers an access request. Under such conditios, if a priority selecting circuit 5 selects a processor 1-1, this result is set to flip-flops 6-1-5-n and then led to interfaces 4-1-4-n to accept an instruction of the processor 1-1. As a result, a selecting circuit 9 delivers the data of the flip- flops 6-1-6-n to the processor 1-1 in place of the data of a memory 3 by an instruction of a working designating circuit 8. Thus a processor can read the priority selection result, and accordingly whether or not the priority selecting circuit performs a correct selection of priority based on the sequence of priority can be inspected. |
