| 摘要 |
PURPOSE:To increase the line width of a flat section in the periphery of the contact of a bit line, and to lower the resistance of the bit line sufficiently by forming a conductive layer between the contact of the bit line and the bit line. CONSTITUTION:A hole pattern 108 as a contact hole is shaped to first CVDSiO2 107 corresponding to a bit-line contact section, polycrystalline silicon is deposited onto the whole surface, heat treatment is executed, and the ohmic contact of polycrystalline silicon and an N-type source or drain diffusion layer 106 is taken. A polycrystalline silicon pattern 109 as a first conductive layer is formed so as to connect the bit line contacts of adjacent cells. An SiO2 film 111 is deposited onto the whole surface through a CVD method, a hole pattern 110 as a contact hole is shaped onto the polycrystalline silicon pattern 109, and MoSi2 is deposited through a sputtering method. An MoSi2 pattern is formed through a photoetching method, and a bit line 112 as a second conductive layer is formed. |
