| 摘要 |
<p>Interlocking of addresses in a system with parallel processors using a common memory space (15) is managed by maintaining for each processor a record of the lock state of the system. When a processor seeks to initiate a transaction, the transaction is analyzed against the lock state record (31), and the processor's request for access to an intercommunication bus is transmitted only when the lock state of the system is in condition to process the transaction. By monitoring and analyzing bus transactions, the lock state record (31) of each processor is maintained up to date. By thus blocking a transaction involving a locked address before the bus is requested, the tying up of the bus in futile activity is avoided.</p> |
