发明名称 |
METHOD AND APPARATUS FOR GENERATING PHASE LOCKED DIGITAL CLOCK SIGNALS |
摘要 |
A method and apparatus for generating two phase locked digital clocks of different word rates particularly suited for a graphic and alphanumeric computer display terminal. Master and slave clock generators are used to generate output pulses at every N-th and M-th clocks of a common clock. A phase lock loop including the master clock generator and a phase lock counter dividing the common clock by the factor of the least common multiple of N and M is used to synchronize the slave clock generator. |
申请公布号 |
DE3478354(D1) |
申请公布日期 |
1989.06.29 |
申请号 |
DE19843478354 |
申请日期 |
1984.03.28 |
申请人 |
TEKTRONIX, INC. |
发明人 |
IRVIN, DARRELL BOOTS |
分类号 |
H03K3/78;G06F1/04;G06F1/12;G09G5/40;(IPC1-7):G06F1/04 |
主分类号 |
H03K3/78 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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