| 摘要 |
In a known electronic multiplier, the input quantities are fed, displaced in time, via an amplifier with an alterable amplification factor to an analog-to-digital converter. A microcomputer multiplies the digitally coded values which correspond to the input quantities (E1, E2). The object of the invention is to implement a cost-effective multiplication of two input quantities. To achieve the object, at the start of each clock cycle, in a scanning stage, a first input quantity (E1) is captured by the analog-to-digital converter (1). During the further clock cycle, in an evaluation stage, the bit sequence which corresponds to the first input quantity (E1) is output serially by the analog-to-digital converter (1). During each evaluation stage, as each bit is output by the analog-to-digital converter (1), a second input quantity (E2) is multiplied in an evaluation circuit (4) by a factor which corresponds to the significance of the bit, and fed to an integrator (5) if the current bit is high. <IMAGE>
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