发明名称 CLOCK SYNCHRONIZING SYSTEM
摘要 <p>PURPOSE:To make a highly precise internal clock signal run by itself even at the time of trouble by inputting a highly precise self-running clock to a phase lock control system instead of an external clock having come defective. CONSTITUTION:When a detection controlling means 14 detects that the trouble occurred in the external clock signal fE, the highly precise self-running clock signal fE* is inputted to the phase lock control system of a PLO circuit 1 so that the highly precise internal clock signal fI whose frequency and phase follow the self-running signal fE* is supplied to a network system. Thus, a highly reliable clock device to supply the highly precise internal clock following the self running clock signal to the network at the time of the trouble of the external clock signal can be constituted by only connecting a low-cost crystal oscillator to the PLO circuit.</p>
申请公布号 JPH01164142(A) 申请公布日期 1989.06.28
申请号 JP19870320129 申请日期 1987.12.19
申请人 FUJITSU LTD 发明人 SATO MASATAKA;YAMAMOTO TAKAYA;YAMANE KIYOSHI
分类号 H04L7/00 主分类号 H04L7/00
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