Process for forming lightly-doped-drain (LDD) without extra masking steps

摘要

A new lightly doped drain (LDD) process which does not required extra masking steps as compared to the conventional CMOS process is presented. By employing a new two layer side wall spacer technology, the LDD ion implantation for n-channel and p-channel devices can be carried out by sharing the n+ or p+ source and drain ion implantation mask. This approach provides maximum flexibility in designing optimum n- and p- channel LDD MOSFETs without using any additional mask steps other than the conventional CMOS mask levels. This process is also compatible with self-aligned silicide process.