Master-slave flip-flop circuit with three phase clocking

摘要

A master-slave flip-flop circuit includes a master circuit switching element controlled by a first clock signal for controlling transfer of data from an input terminal to a master circuit data holding element which holds data transferred through the master circuit switching element, and a slave circuit switching element controlled by a second clock signal for controlling transfer of data from the master circuit data holding element to a slave circuit data holding element which holds data transferred through the slave circuit switching element. The first clock signal is nearly in phase with, but lags a little behind, the second clock signal.