| 摘要 |
PURPOSE:To enhance the amplification factor for injected lamination logic and reduce the consumption power of injectors by a method wherein the second conductivity type impurity introduced layer of density higher than the second conductivity region is superposed and thus formed thereat between the second conductivity type region or/and collector and the second conductivity type high density buried layer. CONSTITUTION:In a conventional IIL structure, a p-buried layer (n1 layer 10) is formed between the n<+> buried layer 3 and the base p-layer 6 of an inverse transistor as shown by a broken line, and a p-injection layer (n2 layer 11) is formed from the surface as shown likewise by a borken line. By said structure, there is less hole injection from the injector into the n<+> buried layer 3, thus reactive currents decrease, while the hole injection from the injector p<+> layer 5 into the collector p-layer 6 is liable to concentrate, resulting in the increase of collector currents, and simultaneously therefore the current amplification factor can be increased by the p-buried layer 10 and the p-injection layer 11 in a reverse directional n-p-n transistor. |
