| 摘要 |
<p>In the process, two signals are created. The first signal allows the detection of a periodic signal for a short time preceding the theoretical timing position of the periodic signal. The second signal is transmitted a very short time after the theoretical timing position of the periodic signal and serves as substitute periodic signal when the periodic signal has not been detected prior to transmission of the second signal. The circuit, used to receive broadcasted digital data, is comprised of a counter (L), a D flip-flop (Bl) and a clock (CLX) whose frequency is equal to a multiple of the data bit rate to be received. The counter (L) has an initializing input connected to the Q output of the flip-flop (Bl). It has two outputs (X, Y) corresponding to the transmissions of the first and second signals. The first output (X) is connected to the 1 setting input while the second output is connected to the O resetting input of flip-flop (Bl) whose D input is connected to a O level voltage and clock input receives the periodic signal.</p> |
