| 摘要 |
PURPOSE:To protect a storage area in a parallel test by providing a displayer which displays the application of the storage area and the displayer which displays the direction of an instruction processor, and performing control based on the application by using the displayer at the time of making access. CONSTITUTION:When the access is generated from one of the instruction processors and an accessed address is an address in the storage area, a storage element control register 503 is retrieved. And the value of a mode display part is sent to a comparator 504 via a line L57. Meanwhile, the mode of the processor to which the access is made is communicated to the comparator 504 by the displayer 502 via a line L56, then, both modes are compared. When both modes coincide, gates 511 and 512 are opened via a line L58, and the value of a storage element number display part in the register 503 and access data are communicated to a memory device 103, then, the access is performed. When coincidence is not obtained, communication is performed with a decision circuit 505 via a line 510, and the infeasibility of the access is informed to the processor of an access request origin, thereby, it is possible to protect the storage area at the time of performing the parallel test. |
