发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 <p>PURPOSE:To reduce the burden of an external circuit by providing a quality decision function at the time of writing in a programmable ROM or an IC incorporated with programmable ROM. CONSTITUTION:A reading from a EPROM 10 is executed by amplifying the potential change of a bit line selected similarly to a writing by a sense amplifier 11. When an external output enable signal OE goes to 'L', amplified reading information RD is fed to a decoder to execute a prescribed arithmetic processing and inputted to the one terminal of EX-OR12 (12a-12n). The Q output of a delay FF13 (13a-13n) is applied to other terminal. A D-FF13, when a trigger LE is risen to 'H', latches a D input level. A three state buffer 14 (14a-14n) connects the EX-OR12 to O (O1-On) when the signal OE goes to 'L'. A NOR gate 15 is inverted by an inverter 16 to latch the FF13 by the 'L' of the signal OE and a chip enable signal CE, fetch writing information WD to an output Q and hold until a next trigger. Since the EX-OR12 decides the quality of the writing operation, the burden of the external circuit is reduced.</p>
申请公布号 JPH01154398(A) 申请公布日期 1989.06.16
申请号 JP19870314772 申请日期 1987.12.10
申请人 FUJITSU LTD;FUJITSU VLSI LTD 发明人 YAMAGUCHI SATORU
分类号 G11C17/00;G06F12/16;G11C7/00;G11C16/02 主分类号 G11C17/00
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