| 摘要 |
PURPOSE:To attain a high integration by switching the first layer of a double layer gate to a floating and a grounded state by the signal of a sub-bit line, disposing a storing cell on all the intersections of a word line and a bit line and selecting an arbitrary one. CONSTITUTION:In order to select a storing cell11, a switching transistor 13 connected to the sub-bit Sub-BL1 is turned off by the control signal and the gate electrode 15 of the first layer is floated. The voltage VCC of the word line WL1 is applied to turn the transfer gate and a channel of the transistor 11 on. An element 1 connected to the sub-bit line Sub-BL2 is turned on in a cell12 to ground the gate electrode 15 and turn the channel off. In a cell21, the gate electrode 15 of the first layer is floated, however, since it is independent of the gate electrode 15 of the cell11, only the cell11 is selected. In such a way, the storing cells are disposed at all the intersection parts of the word lines and the bit lines by using the chip lay out of the folded bit line system of a RAM to attain the high integration. |
