| 摘要 |
PURPOSE:To form high-resistance without much efforts, by providing at least two layers of high-resistance conductive material layers where load resistance of an inverter are formed and causing a part of a plurality of memory cells to form respective two pieces of load resistance by one side layer of the high-resistance conductive materials and other part of them to form respective two pieces of load resistance by other side layer of the materials concerned. CONSTITUTION:Two layers of poly Si layers where load resistance 1 and Vcc wires 2 are commonly formed are formed and, so to a memory cell located at the left side out of two memory cells, load resistance and a Vcc are formed at a lower poly Si layer and as to the memory cell located at the right side, load resistance and the Vcc wire are formed at an upper poly Si layer. The poly Si layer is deposited at a thickness 1000-1500Angstrom without doping and As is ion-implanted selectively at Vcc wire regions. In this way, as load resistance can be arranged by making its resistance sit astraddle on two cells, the period of load resistance in the stage of a layout may have two times more than achieved with conventional load resistance. Further, as a range affected by doping so as to form the Vcc wire becomes smaller, effective period of load resistance will be in excess of two times even in view of the state of the range affected by doping. |
