发明名称 PHASE DEMODULATION SYSTEM FOR TDMA DATA TRANSMISSION SYSTEM
摘要 PURPOSE:To attain demodulation with high speed and stable phase synchronization by transmitting a channel signal while a carrier is inserted to a head idle data part, and providing a phase demodulator having PLL structure capable of switching a loop constant at the reception side. CONSTITUTION:A start command STRTc is sent from a transmitter 1 via a return line (not shown) at the initial state of receiving a reception channel signal. A low pass loop filter 23b filters a demodulated I channel data signal I-CH by the start command and supplies the result to a VCO 25a. An identification circuit 22a confirms the phase synchronization to select a high loop filter 23c. A holding circuit 23d holds the output of the high loop filter 23c being stably synchronized in phase and the phase detection is applied based on the holding loop output.
申请公布号 JPH01152846(A) 申请公布日期 1989.06.15
申请号 JP19870310921 申请日期 1987.12.10
申请人 FUJITSU LTD 发明人 KUME TOMIYUKI;HACHITSUKA HIROYUKI
分类号 H04L27/22;H04L7/10 主分类号 H04L27/22
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