| 摘要 |
On an n-type single-crystal silicon base (21), an insulating layer (22), a gate electrode (5), another insulating layer (2) and a middle layer (23) are formed using the CVD method. After polishing the top layer down to a flat surface (q), another insulating layer (44) and a silicon substrate (1) are formed, whichmakewhich makes a supporting body (11). The other side of the semiconductor layer (21) is then polished down (6), on top of which formed are o another insulating layer (24), another gate electrode (26), a soruce region (27), a drain region (28), another insulating layer (29), a source electrode (31) and a drain electrode (32). These electrodes (31,32) form a part of a second layer (6) as opposed to a first wiring layer (5) consisting of the gate electrode. |
