| 摘要 |
An integrated circuit which includes a plurality of input storage circuits, each of which has a first input terminal, a first output terminal and a first clock terminal, and, in synchronism with a clock signal fed to the first clock terminal, stores input signals sequentially appearing at the first input terminal to sequentially produce the input signals to the first output terminal. The integrated circuit further includes a logic circuit section composed of at least one of a combinational logic circuit and a sequential logic circuit, the logic circuit section being connected to the first output terminals of the first input storage circuits for receiving the input signals. The integrated circuit further includes a plurality of output storage circuits each of which has a second input terminal, a second output terminal and a second clock terminal, and, in synchronism with a clock signal fed to the second clock terminal, stores output signals sequentially supplied from the logic circuit section to the second input terminal to sequentially produce the output signals to the second output terminal, and includes clock distribution means for generating the clock signal fed to the second clock terminal and the clock signal fed to the first clock terminal which is delayed in phase relative to the clock signal fed to the second clock terminal.
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