| 摘要 |
PURPOSE:To laminate three-dimensionally a storage electrode, to increase its area and to increase a storage capacitance in a DRAM by a method wherein bit lines and a bit line contact hole are first formed and a transfer transistor and the storage capacitance are formed on the bit lines through an insulating film by an SOI manufacturing process. CONSTITUTION:Part of an SiO2 film 14 is removed by anisotropic etching using a resist film as a mask to open and an aperture 15 is formed. The aperture 15 is used as a bit line contact hole for joining bit lines BL1 and BL2 and a source 20 of a transfer transistor T1. A non-doped poly Si film 16 is formed on the whole surface of the film 14, on which the aperture 15 is provided, by a reduced CVD method or the like. After that, the film 16 is flattened and moreover, the film 16 is formed into a single crystal by laser annealing or the like to form an Si film 16a and a SOI structure is formed. Parts of an SiO2 film or an Si3N4 film 21 and so on are removed by anisotropic etching to open and an aperture 22 is formed. The aperture 22 is used as a storage electrode contact hole for joining a storage electrode 23a and the transistor T1. |
