发明名称 GATE ARRAY
摘要 PURPOSE:To eliminate an increase in the size of a chip and a complexity of a process by exclusively providing power wirings and a ground wiring in a specific buffer circuit. CONSTITUTION:Peculiar power source pad 7 and ground pad 8 are connected to specific input and output buffer circuits 9, 12, and have a power terminal 7a and a ground terminal 8a completely disconnected from the power terminal 11 and the ground terminal 12 of other input and output buffer circuits 3, 3 and internal circuit 4. Accordingly, peculiar power terminal and ground terminal are provided in an output buffer circuit having large transient current or normal current and possibility of causing a noise or in an input buffer circuit to which an input signal particularly weak for a noise is applied, thereby avoiding an erroneous operation due to the roundabout introduction of a noise from power wirings or a ground wiring.
申请公布号 JPH01147852(A) 申请公布日期 1989.06.09
申请号 JP19870307178 申请日期 1987.12.04
申请人 NEC CORP 发明人 SHIOTANI SUMIO
分类号 H01L21/82;G11C11/401;G11C11/407;H01L21/822;H01L27/04;H01L27/118;H03K19/173 主分类号 H01L21/82
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