发明名称 VIDEO SIGNAL PROCESSOR
摘要 PURPOSE:To record a video signal with scrambling and to apply descramble at the reproduction system by using the video signal being the result of multiplexing by a multiplexing means for a picture information part delayed by a delay means and a synchronizing signal part extracted by a separator means. CONSTITUTION:A color video signal coming to an input terminal 15 is subject to horizontal synchronizing signal separation by a horizontal synchronizing signal separator circuit 21 via a clamp circuit 16, switch circuits 17, 18 and the result is fed respectively to a monostable multivibrator 22 and a field discrimination circuit 23. The picture part of the video signal from the switch 18 and fed to delay circuits 251-257 being 7 stages of cascade connection. The output signal of the switch 20 (picture information part) is fed to an adder 30 via the switch circuit 28 and multiplexed onto a signal comprising a color burst signal from a delay line 24 and a horizontal synchronizing signal and the result is outputted via an output terminal 31.
申请公布号 JPH01147981(A) 申请公布日期 1989.06.09
申请号 JP19870306376 申请日期 1987.12.03
申请人 VICTOR CO OF JAPAN LTD 发明人 ICHII YUTAKA
分类号 H04N5/92;G06F21/10;H04N7/167;H04N7/169 主分类号 H04N5/92
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