发明名称 SUBSTRATE FOR INTEGRATED CIRCUIT PACKAGES
摘要 The top surface metallurgy of LSI chip carriers is improved by multiple and phased interface of metal layers which enable such metallurgies to be suitable for joining by solder reflow and wire bonding techniques. The modifications result in separating the solder bonding metallurgy from the fan-out conductor metallurgy with an intermediate layer of a metal such as Cr or Ti which prevents the formation of intermetallic alloys which are mechanically weak or brittle and tend to fracture because of thermal fatigue stresses caused by thermal cycling during either multiple (up to 50) solder bonding reflow operations or operation of the circuit. The fan-out metallurgy conductors are preferably composed of Cr-Cu-Cr layers covered by at least one upper metal layer which is separated from the Cu of the conductor by means of a metal such as phased layers of Cr or Ti deposited before the other upper metal layer or layers. Solder ball bonding surfaces are composed of additional metal in the form of Au, Cu and Ni. The solderless bonding surfaces are composed of a metal selected from Au, Cr, Ti, Al and Co. The figure shows a substrate 20 having a fan-out metallurgical structure comprising Cr layers 21, 23 and Cu layer 22. Cr/Cu phase layer 24 separates layer 23 from Cu layer 25 which is overlaid by Cr layer 26. A top coating 29 of ploymer protects the underlying layers. The layers 29, 26 are apertured at regions 28 to permit soldered connections to be made to Cu layer 25 whereas only layer 29 is apertured to permit solderless connections to be made to Cr layer 26.
申请公布号 DE3379820(D1) 申请公布日期 1989.06.08
申请号 DE19833379820 申请日期 1983.06.01
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 BHATTACHARYA, SOMNATH;CHANCE, DUDLEY AUGUSTUS;KOOPMAN, NICHOLAS GEORGE;RAY, SUDIPTA KUMAR
分类号 H01L23/52;H01L23/498;H01L23/538;H05K3/24;(IPC1-7):H01L23/52 主分类号 H01L23/52
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