| 摘要 |
<p>A single-chip integrated semiconductor device, in which a P-type isolation layer, to which the ground voltage is applied, is grown on a semiconductor substrate and a power voltage is applied to the substrate, in which a vettical MOSFET has a drain region of a first N-type well region formed in the P-type isolation layer so as to reach the semiconductor substrate therethrough, and is used in an output device for a load, in which a P-channel MOSFET is provided in the N-type well region formed in the P-type isolation layer, a constant voltage lower than the power voltage being applied to the N-type well region, and an N-channel MOSFET is formed in the P-type isolation layer, and in which the P-channel and N-channel MOSFETs constitute a CMOS circuit constructing a peripheral circuit for the vertical MOSFET.</p> |
