| 摘要 |
PURPOSE:To obtain a stable PLL circuit by connecting a resistor in parallel with a filter so as to decrease the DC gain thereby facilitating the offset adjustment. CONSTITUTION:The DC gain is decreased by connecting a resistor R3 in parallel with a filter formed by connecting a resistor R2 and a capacitor C in parallel with an operational amplifier 4. The DC gain is limited by a value R3/R1 in the gain characteristic of a loop filter 12. Thus, an input voltage to a VCO 13 is not increased even if an offset is deviated and it is not required much tighter adjustment than that of a conventional circuit. |
