发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To expand the spacings between bonding wires and reduce the short- circuits between the bonding wires by a method wherein the row of first bonding pads is provided on the place lower than the place on which the row of second bonding pads is provided. CONSTITUTION:The circumferential part of a semiconductor substrate 15 is scraped off by reactive ion etching or the like to form a step 19 and the row of first bonding pads 13 is formed on the bottom of the step 19. The row of second bonding pads 14 is formed along the circumference of the step 19. The depth of the step 19 is about 30-100mum. The first bonding pad row 13 is formed on the position lower than the position on which the second bonding pad row 14 is formed. As a result, the spacing between a first bonding wire 16 bonded to the first bonding pad 13 and a second bonding wire 17 bonded to the second bonding pad 14 is expanded. As a result, the problem that short-circuits between the bonding wires are created when the spacing between the bonding pad rows is small can be substantially resolved.
申请公布号 JPH01143229(A) 申请公布日期 1989.06.05
申请号 JP19870300726 申请日期 1987.11.27
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 TETSUKA AKITOSHI
分类号 H01L21/60 主分类号 H01L21/60
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