INTEGRIERTE CMOS-SCHALTUNG UND VERFAHREN ZUM HERSTELLEN DERSELBEN
摘要
A CMOS integrated circuit is formed wilh a substrate of single crystalline silicon having a thin zone (15) along a major surface which is denuded of oxygen and a large concentration of oxygen precipitates in the remaining bulk (34) of the substrate. A well region (36) of a conductivity type opposite to that of the substrate is in the substrate at the major surface, and source and drain regions of MOS transistors are formed in the denuded zone of the substrate and the well region. The high concentration of oxygen in the bulk of the substrate reduces the beta of any parasitic bipolar transistor (Q1) formed by the MOS transistors, substrate and well region so as to minimize if not eliminate latch-up problems in the integrated circuit. <IMAGE>
申请公布号
DE3837270(A1)
申请公布日期
1989.06.01
申请号
DE19883837270
申请日期
1988.11.03
申请人
INTERSIL INC., CUPERTINO, CALIF., US
发明人
BAIRD, STUART LYNN, SAN JOSE, CALIF., US;HUNTER, BRUCE DWIGHT, SUNNYVALE, CALIF., US;KASHKOOLI, FRED, CUPERTINO, CALIF., US;MOSTYN, GRAHAM YORKE, SARATOGA, CALIF., US