| 摘要 |
A high reliability computer system comprising a system bus arrangement, an arrangement of processor modules in a MASTER/CHECKER pair located on said computer card and connected to said system bus arrangement, a power supply module supplying power to the computer system, said power supply module arrangement connecting to the computer system through a plurality of interconnecting lines, logic circuitry connected to said plurality of interconnecting lines for processing a plurality of system support signals transmitted by said power supply arrangement to the computer systems, to insure the integrity of said system support signals, and a interrupt signal line as part of said interconnecting lines.
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