| 摘要 |
PURPOSE:To reduce a substantial resistance regarding a word line and to effectively avoid the delay of a signal by forming a capacitor in a shape that broadens offset toward one direction with respect to a bit line B. CONSTITUTION:A capacitor for forming a memory cell is formed in its large area section at a position displaced in one direction from a bit line B, and a disposing section of a contact window 13 for contacting a lower polycrystalline silicon layer 18 for forming a word line W with an upper metal wiring layer 24 is obtained on this large area section. Thus, a connecting section of the layer 18 of the word line W to the layer 24 can be disposed and composed with respect to cells, i.e., bits thereby to reduce the distributed resistance of the word line W, thereby shortening the delay time of a signal. |
