| 摘要 |
<p>PURPOSE:To utilize an external instruction memory large in capacity by providing at least two kinds of gate circuits which receive the address output of arithmetic control part and the output of a write control signal as input signals, and a counter circuit which receives the output of the gate circuits as a clock and a clear signal. CONSTITUTION:The arithmetic control part 1 drives the clock input terminal 32 or the clear terminal 31 of the counter circuit 3 by performing a write operation on an address set in advance. And a numeric value appearing at the output 35 of the counter circuit 3 is increased one by one by driving the clock input terminal 32. Also, the output 35 is set at '0' by driving the clear terminal 31. And to the address input 41 of an instruction memory 2, the address output 21 of the arithmetic control part 1 is connected as a first address, and the output 35 of the counter circuit 3 as a second address, and an instruction on the instruction memory 2 is designated by the sum of the first and second addresses.</p> |
