发明名称 INHIBITING CIRCUIT FOR EXCESSIVE DETECTION
摘要 PURPOSE:To inhibit a defect of a substrate wiring pattern from being detected excessively by outputting a defect presence signal when the number of picture element defects included in a register circuit of unit cells which are arranged in a matrix and store picture element information is >=2. CONSTITUTION:The unit register circuit 30 where unit matrix cells 20 are formed is connected to an OR circuit 31, whose output is connected to an FF 25 through an AND circuit 24. Further, a counter 22 is connected to the input of the register 30 at the same time and its output is supplied to an input of a comparator 23 and compared with a reference number 2. The output of the comparator 23 is connected to the AND circuit 24. Then the comparator 23 compares the number of defective picture elements in the counter 22 every time picture element information of a unit cell ends and when the number of the defective picture elements is <2, picture element data in the unit register 30 is inhibited by an AND gate. Consequently, when there are >=2 defects, the defect presence signal is outputted to prevent defects from being detected excessively.
申请公布号 JPH01134272(A) 申请公布日期 1989.05.26
申请号 JP19870292520 申请日期 1987.11.19
申请人 FUJITSU LTD;FUJITSU AUTOM KK 发明人 YAGI KAZUO;FUJIWARA KATSUMI;SHINOHARA KATSUO
分类号 G01R31/02;G06T1/00;G06T7/00;H05K3/00 主分类号 G01R31/02
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