| 摘要 |
<p>A microprogram control unit fetches a next microinstruction based upon a branch/no-branch condition which is determined by the processing of a current microinstruction and in concurrence with the processing of the current microinstruction. Both a branch microinstruction and a next sequential microinstruction are fetched from a microinstruction memory (12), but only one of them, based upon the branch condition, is transferred to a microinstruction register (24) at the start of the next microinstruction cycle. Each microinstruction includes a branch address field which may be stored in a branch address latch (18). Sequential addresses are generated by an address incrementor (16) and may be stored in a next address latch (19). An address register (22) alternately addresses the memory (12) with the sequential and branch addresses. The output microinstructions are selected by a microinstruction latch (17) enabled by the same signal LEN as the latches (18) and (19) which is generated (34) in accordance with the branch/no-branch condition.</p> |
