发明名称 Polycrystalline semiconductor deposition in groove for device insolation
摘要 In an improved metal-oxide-semiconductor (MOS) device a polycrystalline semiconductor region is buried in a monocrystalline semiconductor substrate at the isolation region between elements of the device. A deep and narrow groove of about 1 mu m is formed by reactive ion etching in which the polycrystalline silicon is deposited by chemical vapor deposition. Surface polycrystalline semiconductor is removed by etching resulting in only the polycrystalline semiconductor buried in the substrate which is implanted with ions. Alternatively, polycrystalline semiconductor is deposited only in the bottom portion of the groove, ion implanted and an insulator film is formed in the remaining portion of the groove for fully isolating the polycrystalline region. Semiconductor devices prepared in accordance with the invention have flattened surfaces, reduced crystal defects and permit further miniaturization of the MOS devices.
申请公布号 US4833098(A) 申请公布日期 1989.05.23
申请号 US19880256948 申请日期 1988.10.13
申请人 SIEKO EPSON CORPORATION 发明人 KATO, JURI
分类号 H01L21/76;H01L21/763 主分类号 H01L21/76
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