发明名称 |
Semiconductor memory device having improved interconnection structure of memory cell array |
摘要 |
A memory cell array is divided into two groups, one bit line of a pair of bit lines is connected to corresponding memory cells in the first group of the memory cell array, and the other bit line thereof is connected to corresponding memory cells in the second group of the memory cell array.
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申请公布号 |
US4833518(A) |
申请公布日期 |
1989.05.23 |
申请号 |
US19870094646 |
申请日期 |
1987.09.09 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
MATSUDA, YOSHIO;MASHIKO, KOICHIRO;ARIMOTO, KAZUTAMI;MATSUMOTO, NORIAKI;FURUTANI, KIYOHIRO |
分类号 |
H01L27/10;H01L21/8242;H01L23/528;H01L27/108;H01L29/94 |
主分类号 |
H01L27/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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