| 摘要 |
PURPOSE:To shorten device access time in a memory cell formed by dividing it into a plurality of blocks, by disposing the memory cell selected by bit lines and word lines located at outer peripheral parts of the respective blocks. CONSTITUTION:A cell array is constructed such that cells located at respective ends are at an equal distance from a chip center. Only one cell 11a among the cell arrays 11 located at a distance from the chip center is moved. This facilitates substantially column decoding and row decoding. Further, the cell 11b is arranged stepwise and a bit line connected to the cell positioned at the tip of a long word line is more shortened. Accordingly, the access time of each cell, which is primarily defined by the length of the word line and the capacitance of a bit line is made uniform. Hereby, an error of lens resolution upon masking is made adjustable to uniformize the access time of each cell defined by the word line length and the bit line length (capacity). |
