发明名称 MANUFACTURE OF MULTILAYER INTERCONNECTION SUBSTRATE
摘要 <p>PURPOSE:To enable the second conductive pattern to be formed on the first conductive pattern in a short time by forming a resin coat film which surrounds one part of a pattern, by adhering a resin layer with a metal foil on a conductive pattern, and by performing etching of metal foil. CONSTITUTION:After providing an opening 4 corresponding to a resin coat film 3 and a hole 5 for a via hole to a resin with metal foil 6, the resin layer with metal film 6 is adhered to an insulation substrate 1. Then, a hole 5 for via hole is formed on the resin with metal film 6 by punching etc., previously and heat crimping is performed to the entire surface of the substrate 1. Then, a dry film 9 is heat-crimped to the substrate 1 to be adhered to the entire surface of the substrate 1, a film 9 is removed by the photoetching method, and via hole is formed. Then, via hole is electrically plated and the first conductive pattern 2 and a copper foil 7 are connected. Then, after the dry film 9' is left only on the copper foil 7 which becomes the second conductive pattern 10 and on a conductive pattern 2 within the resin coat film and the other parts are eliminated. The second conductive pattern 10 on the conductive pattern 2 is formed.</p>
申请公布号 JPH01128493(A) 申请公布日期 1989.05.22
申请号 JP19870286205 申请日期 1987.11.12
申请人 SANYO ELECTRIC CO LTD 发明人 KAZAMI AKIRA;MORI HARUHIKO;ISHIHARA SUMIO
分类号 H05K3/46;H01L23/12 主分类号 H05K3/46
代理机构 代理人
主权项
地址