SATURATION LIMITING SYSTEM FOR VERTICAL P-N-P TRANSISTOR WITH ISOLATED COLLECTOR AND MONOLITHIC INTEGRATION OF ITS CONSTRUCTION

摘要

PURPOSE: To prevent the deep saturation of a vertical PNP transistor having a separated collector by forming an auxiliary collector area in an epitaxial layer in the zone between a collector sinker diffusing section and a separated diffusing section so that the auxiliary collector area can be connected to the input terminal of an anti-saturation circuit. CONSTITUTION: An auxiliary collector C<1> is formed by diffusing boron in the area of an epitaxial layer 2 contained in the whole area of a transistor which is in contact with separating sections 3b and 3t. The area 10 of the collector C<1> is formed by utilizing either a P-type boron diffusing profile used for forming an emitter area 10 or a P<+> -type boron diffusing profile used for forming a head-section separating diffusing section 3t (and the sinker diffusing section 6 of a true collector C). The collector C<1> is connected to the input terminal of an anti-saturation circuit and can reduce the driving base current of a transistor T1 by collecting part of a leakage current flowing to a substrate when a PNP transistor is saturated.