发明名称 COMMUNICATION SYSTEM BETWEEN PROCESSING CIRCUITS
摘要 <p>PURPOSE:To attain high speed syochronizing communication with simple circuit constitution by generating a serial clock signal with arranged phase to each processing circuit and allowing each processing circuit to transmit/receive a data from one circuit to other circuit synchronizingly. CONSTITUTION:When initialization of processing circuits 1a, 1b is finished, a signal D from a start signal generating circuit 9 goes to a high level. A system clock signal is also given to frequency division circuits 5a, 5b receiving the signal D and the circuits start the frequency division of the system clock signal when the signal D goes to a high level and a serial clock signal is generated. The arithmetic processing is applied in a transmission circuit 7a and a reception circuit 8a and the data transmission/reception is applied. Thus, synchronizing high speed communication is applied with simple circuit constitution.</p>
申请公布号 JPH01126845(A) 申请公布日期 1989.05.18
申请号 JP19870286709 申请日期 1987.11.12
申请人 FUJITSU TEN LTD 发明人 WATANABE HIDEO
分类号 H04L25/38;H04L7/00;H04Q9/14 主分类号 H04L25/38
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