发明名称 REGISTER SETTING SYSTEM
摘要 PURPOSE:To improve the software processing efficiency by sending the common command signals to plural slave elements from a master element so that the accesses are carried out to the registers where the same value is set by a single operation. CONSTITUTION:The common command signals are given to slave elements 11...n from a master element 10 via a signal line 104. When a host 101 sets a register to the element 10, the element 10 sends the common signals to the elements 11...n as long as the values which set 1...i are common to each other. With output of the common signals, the elements 11...n set the same value as that set to the element 10 to the corresponding registers 1...i. No common signal is given to the values supplied to registers (i+1)...m. Thus the common signals is set to the element 10 only. While only the common signals are given to the elements 11...n and therefore only the register that is selected by the host 101 receives an access.
申请公布号 JPH01125621(A) 申请公布日期 1989.05.18
申请号 JP19870283843 申请日期 1987.11.10
申请人 FUJITSU LTD 发明人 SHIBATA YASUHIDE
分类号 G06F7/00 主分类号 G06F7/00
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