| 摘要 |
PURPOSE:To allow the title comparator to have both high phase detection sensitivity and frequency sensitivity by providing a phase comparator having no frequency sensitivity and a phase frequency comparator having frequency sensitivity and adding the outputs of both of them. CONSTITUTION:The output of an EOR gate 1 is outputted to a VO terminal through an output synthesizing resistance 4. A reference signal supplied from an fR terminal is divided into 1/N by a frequency divider 9, and inputted to a phase frequency comparator 3. Also, an input signal supplied from an fV terminal is also divided into 1/N by a frequency divider 10 in the same way, and inputted to the phase frequency comparator 3. When the frequencies of the reference signal and the input signal are equal, a phase comparison is executed mainly by the EOR gate 1. On the other hand, when the frequencies of the reference signal and the input signal are different, the phase frequency comparator 3 executes a frequency comparison. According to such a constitution, a phase comparator having both high phase detection sensitivity of the EOR gate 1 and frequency sensitivity of the phase frequency comparator can be formed. |
