发明名称 PATTERN GENERATOR
摘要 PURPOSE:To continuously take out a long pattern signal from a DRAM by adopting plural DRAMs in which the same pattern signal is stored, reading out alternately the pattern signal from the DRAMs, and also, refreshing the DRAM which is executing no read-out. CONSTITUTION:When a select signal 22 is set to '0', a pattern address 11 is applied to a DRAM 5, a pattern signal 51 comes out to an output terminal 8, and also, a refresh address 21 is applied to a DRAM 6, and the DRAM 6 is refreshed. When the select signal 22 is set to '1', the pattern address 11 is applied to the DRAM 6, a pattern signal 61 stored in the DRAM 6 comes out to the output terminal 8, and also, the refresh address 21 is applied to the DRAM 5, and the DRAM 5 is refreshed. In such a way, during the time (T) of two times of a data holding time (T/2) of the DRAMs 5, 6, the pattern signals 51, 61 are taken out continuously from a selector 7.
申请公布号 JPH01125013(A) 申请公布日期 1989.05.17
申请号 JP19870189754 申请日期 1987.07.29
申请人 ANDO ELECTRIC CO LTD 发明人 ISHIKURA KAZUO
分类号 G01R31/3183;G01R31/28;G06F11/22;H03K3/78 主分类号 G01R31/3183
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